Question: How many bits are necessary to access 4 GB of memory?
Memory addresses are specified by a segment origin and an offset within the segment. The adder of the BIU is used to obtain the actual physical address from the segment origin and the offset.
Question#1: How many bits wide is the segment register, say CS which is the code segment register and contains the base address of the code segment?
Question#2: How many bits wide is the IP (instruction pointer) which points to a memory offset within the code segment?
Question#3: How many bits are necessary to access 1MB of memory?
Question#4: How are the CS:IP register pair used to access 1MB of memory?
Question#5: If the CS-register contains the value FAF0 and the IP-register contains the value 0012, what is the actual physical address represented by the CS:IP register pair?
©Douglas J. Ryan
Douglas J. Ryan/ryandj@pacificu.edu