Chapter 4 - Data Transfers, Addressing, and Arithmetic
Before discussing different modes of addressing, let's lay out the possible types of operands that can exist.
Operand Description
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r8 8-bit general purpose register [GPR] (AH, AL, ... DH, DL)
r16 16-bit GPR (AX, BX, CX, DX, SI, DI, SP, BP)
r32 32-bit GPR (EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP)
reg any GPR
sreg 16-bit seg reg (CS, DS, SS, ES, FS, GS)
imm any immediate value of 8, 16, or 32-bits
imm8
imm16
imm32
r/m8 8-bit register or memory byte
r/m16
r/m32
mem a memory operand of size 8, 16, or 32-bits
Memory Addressing
Remember, the IA-32 Processor can address 1MB of memory in Real Mode and 4 GB in Protected Mode. We will assume Real Mode unless otherwise stated.
Direct Memory Addressing
Consider:
.data
val1 BYTE 5h
If val1 was located at address 1400h, then an assembled instruction would look something like:
mov al,[1400]
(i1) MOV dest, src
MOV places the contents of the src operand into the destination location.
- Operands must match in size
- Both operands cannot be memory
- The destination operand cannot be CS, EIP, or IP
- One cannot move an immediate value into a segment register
When looking at possible MOV instructions, the following are possible legal instructions:
- MOV reg, reg
- MOV mem, reg
- MOV reg, mem
- MOV mem, imm
- MOV reg, imm
- MOV r/m16, sreg ; Real Mode Only
- MOV sreg, r/m16 ; Real Mode Only
P#1: Since we cannot do a mem to mem MOV instruction, write an assembly language program segment that has both a data and code segment. Place two variables in the data segment and move the value from the first variable to the second.
(i2) MOVZX dest, src
- MOVZX r32, r/m8
- MOVZX r32, r/m16
- MOVZX r16, r/m8
The MOVZX zero extends the src value and places the result into the destination operand.
Q#1: What does it mean to zero extend a value?
Q#2: Why would we use an instruction that zero extends a value? HINT: Think about unsigned vs 2's complement numbers?
(i3) MOVSX dest, src
- MOVSX r32,r/m8
- MOVSX r32,r/m16
- MOVSX r16,r/m8
The MOVSX sign extends the src value and places the result into the destination operand.
Q#3: What does it mean to sign extend a value?
(i4) LAHF ; load the low byte of the flags register into AH
(i5) SAHF ; store the value of AH into low byte of the flags register
(i6) XCHG op1, op2
- XCHG reg,reg
- XCHG reg,mem
- XCHG mem,reg
The XCHG instruction interchanges the values in op1 and op2.
©Douglas J. Ryan/ryandj@pacificu.edu